Spread spectrum clocks are used in integrated circuits, for example in system on chips, processors, and chipset chips, to reduce the adverse effects of electro-magnetic interference (EMI). They are clocks with changing frequencies, usually vacillating between a max. and min. value in accordance with a desired modulation profile function (e.g., sine wave, triangle wave, etc.). Conventional circuits commonly generate SSC clocks inside a PLL, either by modulating a VCO control voltage or by modulating a feedback divider ratio. Unfortunately, modulating the VCO control voltage can be difficult, especially when the VCO gain is high and noise within the bandwidth of the PLL loop filter is typically directly coupled to the VCO. Modulating the feedback divider ratio can be done digitally but filtering out the spurious tone created by this requires a good low-pass filter and other techniques such as noise shaping. Accordingly, new approaches are desired.